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LZ24BP
LZ24BP
DESCRIPTION
The LZ24BP is a 1/4-type (4.5 mm) solid-state image sensor that consists of PN photo-diodes and CCDs (charge-coupled devices). With approximately 350 000 pixels (692 horizontal x 504 vertical), the sensor provides a stable highresolution color image. All pixel signals can be read independently via the vertical shift register and horizontal shift register.
1/4-type Progressive-scan Color CCD Area Sensor with 350 k Pixels
PIN CONNECTIONS
14-PIN HALF-PITCH WDIP TOP VIEW
OV2 1 OV1 2 OV3A 3 OV3B 4 PW 5 GND 6 OS 7
14 OH2 13 OH1 12 ORS 11 NC 10 OFD 9 GND 8 OD
FEATURES
* * * * * Progressive scan Square pixel Compatible with VGA format Number of effective pixels : 659 (H) x 494 (V) Number of optical black pixels - Horizontal : 2 front and 31 rear - Vertical : 8 front and 2 rear Number of dummy bits - Horizontal : 16 - Vertical : 5 Pixel pitch : 5.6 m (H) x 5.6 m (V) R, G, and B primary color mosaic filters Low fixed-pattern noise and lag No burn-in and no image distortion Blooming suppression structure Built-in output amplifier Built-in overflow drain voltage circuit and reset gate voltage circuit Horizontal shift register clock and reset gate clock voltage : 3.3 V (TYP.) Variable electronic shutter (1/30 to 1/10 000 s) Package : 14-pin half-pitch WDIP [Plastic] (WDIP014-P-0400A) Row space : 10.16 mm
(WDIP014-P-0400A)
*
PRECAUTIONS
* The exit pupil position of lens should be more than 25 mm from the top surface of the CCD. * Refer to "PRECAUTIONS FOR CCD AREA SENSORS" for details.
* * * * * * * * * *
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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LZ24BP
PIN DESCRIPTION
SYMBOL OD OS ORS OV1, OV2, OV3A, OV3B OH1, OH2 OFD PW GND NC PIN NAME Output transistor drain Output signals Reset transistor clock Vertical shift register clock Horizontal shift register clock Overflow drain P-well Ground No connection
ABSOLUTE MAXIMUM RATINGS
PARAMETER Output transistor drain voltage Overflow drain voltage Reset gate clock voltage Vertical shift register clock voltage Horizontal shift register clock voltage Voltage difference between P-well and vertical clock Voltage difference between vertical clocks Storage temperature Ambient operating temperature SYMBOL VOD VOFD VORS VOV VOH VPW-VOV VOV-VOV TSTG TOPR RATING 0 to +18 Internal output Internal output -11.5 to +17.5 -0.3 to +12 -29 to 0 0 to +15 -40 to +85 -20 to +70
(TA = +25 C)
UNIT V V V V V V V C C 3 NOTE 1 2
NOTES :
1. Do not connect to DC voltage directly. When OFD is connected to GND, connect VOD to GND. Overflow drain clock is applied below 27 Vp-p. 2. Do not connect to DC voltage directly. When ORS is connected to GND, connect VOD to GND. Reset gate clock is applied below 8 Vp-p. 3. When clock width is below 10 s, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be below 28 V.
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LZ24BP
RECOMMENDED OPERATING CONDITIONS
PARAMETER Ambient operating temperature Output transistor drain voltage Overflow drain clock p-p level Ground P-well voltage LOW level Vertical shift register clock INTERMEDIATE level HIGH level Horizontal shift register clock LOW level HIGH level SYMBOL TOPR VOD VOOFD GND VPW VOV1L, VOV2L VOV3AL, VOV3BL VOV1I, VOV2I VOV3AI, VOV3BI VOV3AH, VOV3BH VOH1L, VOH2L VOH1H, VOH2H VORS fOV1, fOV2 fOV3A, fOV3B fOH1, fOH2 fORS 14.55 -0.05 3.0 3.0 MIN. 14.55 22.5 0.0 -10.0 -9.5 -9.0 0.0 15.0 0.0 3.3 3.3 15.73 12.27 12.27 15.45 0.05 5.5 5.5 VOVL -8.5 TYP. 25.0 15.0 MAX. 15.45 UNIT C V V V V V V V V V V kHz MHz MHz 1 1 2 NOTE
Reset gate clock p-p level Vertical shift register clock frequency Horizontal shift register clock frequency Reset gate clock frequency
NOTES :
1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly. 2. VPW is set below VOVL that is low level of vertical shift register clock, or is used with the same power supply that is connected to VL of V driver IC. * To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
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LZ24BP
CHARACTERISTICS (1/30 s progressive scan readout mode)
(TA = +25 C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS". Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1 mmt) is used.)
PARAMETER Standard output voltage Photo response non-uniformity Saturation output voltage Dark output voltage Dark signal non-uniformity Sensitivity (green channel) Smear ratio Image lag Blooming suppression ratio Output transistor drain current SYMBOL VO PRNU VSAT VDARK DSNU R SMR AI ABL IOD 300 4.0 8.0 mA 165 MIN. TYP. 150 MAX. 10 450 0.5 0.5 230 -94 3.0 2.0 -86 1.0 UNIT mV % mV mV mV mV dB % NOTE 2 3 4 1, 5 1, 6 7 8 9 10
NOTES :
* Within the recommended operating conditions of VOD, VOFD of the internal output satisfies with ABL larger than 300 times exposure of the standard exposure conditions, and VSAT larger than 450 mV. 1. TA = +60 C 2. The average output voltage of G signal under uniform illumination. The standard exposure conditions are defined as when Vo is 150 mV. 3. The image area is divided into 10 x 10 segments under the standard exposure conditions. Each segment's voltage is the average output voltage of all pixels within the segment. PRNU is defined by (Vmax - Vmin)/Vo, where Vmax and Vmin are the maximum and minimum values of each segment's voltage respectively. 4. The image area is divided into 10 x 10 segments. Each segment's voltage is the average output voltage of all pixels within the segment. VSAT is the minimum segment's voltage under 10 times exposure of the standard exposure conditions. 5. The average output voltage under non-exposure conditions. 6. The image area is divided into 10 x 10 segments under non-exposure conditions. DSNU is defined by (Vdmax - Vdmin), where Vdmax and Vdmin are the maximum and minimum values of each segment's voltage respectively. 7. The average output voltage of G signal when a 1 000 lux light source with a 90% reflector is imaged by a lens of F4, f50 mm. 8. The sensor is exposed only in the central area of V/10 square with a lens at F4, where V is the vertical image size. SMR is defined by the ratio of the output voltage detected during the vertical blanking period to the maximum output voltage in the V/10 square. 9. The sensor is exposed at the exposure level corresponding to the standard conditions. AI is defined by the ratio of the output voltage measured at the 1st field during the non-exposure period to the standard output voltage. 10. The sensor is exposed only in the central area of V/10 square, where V is the vertical image size. ABL is defined by the ratio of the exposure at the standard conditions to the exposure at a point where blooming is observed.
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LZ24BP
PIXEL STRUCTURE
OPTICAL BLACK (2 PIXELS)
yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy ,,,,,,,,, ,,,,,,,,, yyyyyyyyy ,,,,,,,,, yyyyyyyyy
1 pin 659 (H) x 494 (V) OPTICAL BLACK (8 PIXELS)
OPTICAL BLACK (2 PIXELS)
OPTICAL BLACK (31 PIXELS)
COLOR FILTER ARRAY
(1, 494) (659, 494)
G R G R G R
B G B G B G
G R G R G R
B G B G B G
G R G R G R
G R G R G R
B G B G B G
G R G R G R
B G B G B G
G R G R G R
G R G R G R
(1, 1)
B G B G B G
G R G R G R
B G B G B G
G R G R G R
G R G R G R
B G B G B G
G R G R G R
B G B G B G
G R G R G R
(659, 1)
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LZ24BP
TIMING CHART
VERTICAL TRANSFER TIMING
525 1 HD VD OV1 OV2 OV3A OV3B OOFD
492 493 494 OB2 OB1 D1 D2 D3 D4 D5 OB2 OB4 OB6 OB8 OB1 OB3 OB5 OB7 1 2
10
20
30
OS
HORIZONTAL TRANSFER TIMING
780, 1 HD 35 OH1 OH2 ORS OS 659 OV1 47 OV2 OV3A OV3B OOFD 59 72 95 95 83 OB (31) 35 71 107 78
PRE SCAN (16) OB (2) OUTPUT (659) 1
READOUT TIMING
HD OV1 OV2 OV3A OV3B 5.05 s 39.8 s (489 bits) 46.9 s (576 bits) 63.5 s (780 bits) (62 bits)
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VOD
+ 100 $ 0. 47 F 270 pF 1 M$ 0.01 F 1 M$
ORS OH1
OH2 VL (VPW)
+
VH
NC V4 V2 VL
OH2
OH1
ORS
V1A
V1B
V3A
V3B
OD
NC
SYSTEM CONFIGURATION EXAMPLE
POFD
GND
OFD
VMa
VMb
VH
+
12 11 10
9
8
7
6
54 (*3)
3
2
1
14 13 12 11 10
(*1) (*1)
9
8
7
LR36685
(*2)
LZ24BP
(*3)
13 14 15 16 17 18 19 20 21 22 23 24
V4X + V3X V1X V2X VDD GND VOFDH VH1BX VH3AX VH1AX VH3BX OFDX
1
OV2
2
OV1
3
OV3A
4
OV3B
5
PW
6
GND
7
OS
(*2) V1X
VH3AX
CCD OUT
+5 V V3X V2X OFDX VH3BX
(*1) ORS, OFD : Use the circuit parameter indicated in this circuit example, and do not connect to DC voltage directly. (*2) Connect V1X of timing generator to V4X of V driver IC, LR36685. (*3) Connect V4 of V driver IC to OV1 of LZ24BP.
LZ24BP
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
14 WDIP (WDIP014-P-0400A)
10.000.10 1.960.05 9.000.10 () 14 8 Center of effective imaging area and center of package ( : Lid's size) 9.000.10 ()
(Unit : mm)
0.03 Glass Lid
10.000.10
CCD Package 1.390.05 0.03 Cross section A-A'
5.000.075 0.500.50 CCD
1 0.500.50 5.000.075
7 Rotation error of die : = 1.0
MAX.
3.500.30 3.350.10
2.550.10
A 5.02MAX.
1.270.25
A' 0.30TYP. 0.46TYP. 0.25 M
0.250.10 P-1.27TYP.
10.16-0
+0.5
8
0.800.05 ()
PRECAUTIONS FOR CCD AREA SENSORS
PRECAUTIONS FOR CCD AREA SENSORS 1. Package Breakage
In order to prevent the package from being broken, observe the following instructions : 1) The CCD is a precise optical component and the package material is ceramic or plastic. Therefore, o Take care not to drop the device when mounting, handling, or transporting. o Avoid giving a shock to the package. Especially when leads are fixed to the socket or the circuit board, small shock could break the package more easily than when the package isn't fixed. 2) When applying force for mounting the device or any other purposes, fix the leads between a joint and a stand-off, so that no stress will be given to the jointed part of the lead. In addition, when applying force, do it at a point below the stand-off part. (In the case of ceramic packages) - The leads of the package are fixed with low melting point glass, so stress added to a lead could cause a crack in the low melting point glass in the jointed part of the lead.
Low melting point glass Lead
(In the case of plastic packages) - The leads of the package are fixed with package body (plastic), so stress added to a lead could cause a crack in the package body (plastic) in the jointed part of the lead.
Glass cap Package Lead Fixed
Stand-off
3) When mounting the package on the housing, be sure that the package is not bent. - If a bent package is forced into place between a hard plate or the like, the package may be broken. 4) If any damage or breakage occurs on the surface of the glass cap, its characteristics could deteriorate. Therefore, o Do not hit the glass cap. o Do not give a shock large enough to cause distortion. o Do not scrub or scratch the glass surface. - Even a soft cloth or applicator, if dry, could cause dust to scratch the glass.
2. Electrostatic Damage
Fixed
Stand-off
As compared with general MOS-LSI, CCD has lower ESD. Therefore, take the following anti-static measures when handling the CCD : 1) Always discharge static electricity by grounding the human body and the instrument to be used. To ground the human body, provide resistance of about 1 M$ between the human body and the ground to be on the safe side. 2) When directly handling the device with the fingers, hold the part without leads and do not touch any lead.
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PRECAUTIONS FOR CCD AREA SENSORS
3) To avoid generating static electricity, a. do not scrub the glass surface with cloth or plastic. b. do not attach any tape or labels. c. do not clean the glass surface with dustcleaning tape. 4) When storing or transporting the device, put it in a container of conductive material. o The contamination on the glass surface should be wiped off with a clean applicator soaked in Isopropyl alcohol. Wipe slowly and gently in one direction only. - Frequently replace the applicator and do not use the same applicator to clean more than one device. Note : In most cases, dust and contamination are unavoidable, even before the device is first used. It is, therefore, recommended that the above procedures should be taken to wipe out dust and contamination before using the device.
3. Dust and Contamination
Dust or contamination on the glass surface could deteriorate the output characteristics or cause a scar. In order to minimize dust or contamination on the glass surface, take the following precautions : 1) Handle the CCD in a clean environment such as a cleaned booth. (The cleanliness level should be, if possible, class 1 000 at least.) 2) Do not touch the glass surface with the fingers. If dust or contamination gets on the glass surface, the following cleaning method is recommended : o Dust from static electricity should be blown off with an ionized air blower. For antielectrostatic measures, however, ground all the leads on the device before blowing off the dust.
4. Other
1) Soldering should be manually performed within 5 seconds at 350 C maximum at soldering iron. 2) Avoid using or storing the CCD at high temperature or high humidity as it is a precise optical component. Do not give a mechanical shock to the CCD. 3) Do not expose the device to strong light. For the color device, long exposure to strong light will fade the color of the color filters.
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